Pore control… on a wafer scale?
Last week the rotation stage broke in the middle of a deposition. The wafer came out looking very non-uniform, and judging by the color of the film there was at least a 10 nm gradient. Since I’m not sure when the motor stopped, it’s hard to say if the underlying oxide is non-uniform as well, or if it’s just the silicon. I’m confident it stopped before the top capping oxide since the film color is most strongly dependent on the silicon film thickness.
Charles thought it would be interesting to anneal this wafer (1000 C 100 C/s no sus) and etch it.
The thicknesses are just estimates, but judging by the morphology I think my guesses are close. I’m not sure if this has any commercial value, but it was cool to see the drastic change in pore type across the same wafer. This does make the case for a highly uniform film deposition process (remember the CVC days?).
The yield looks pretty high on this wafer – how was the pinhole density? Can we do a few burst pressures on the the different thicknesses to see if everything is consistent. Do the membranes themselves go from bright white (thick) to light blue (thin)?
It’s surprising to me that thin membranes with a thin capping oxide layer would not take some kind of yield hit. There could be some very useful information here.
The wafer ranges in color from really light blue, top of the wafer, to a light brown-gray at the bottom of the wafer. This is with the flat to the right.
I counted the samples lost to pinholes based on quadrants and the top half which is white to blue in color (thicker) has 26 samples lost to pinholes and the bottom half of the wafer with a purple to brown (thinner) had 6 samples lost to pinholes. It’s counter intuitive that the thinner SiO2/Si layers have less pinholes than the thicker SiO2/Si layers.
The thinner silicon is more resistant to crystallization (small pores) and thus less prone to pinholes. E.g. we rarely see pinholes in an amorphous membrane.
I’m starting to like the concept of intentionally depositing a linearly (approximately) varying film thickness for characterization purposes. The changes in morphology shown in this post is striking, since it covers almost everything we have seen over multiple weeks in 10’s of wafers. If we use a mask design with many more TEMs distributed across the surface, we could test 20 different thicknesses on a single wafer.
Granted, the temp uniformity and atomic trajectories won’t perfectly match our standard uniform process, but the data above suggests that it could be a good approximation. This would also be a good way to determine if oxide thickness affects pore morphology.
Let’s design an appropriate mask and try this on 1 or 2 more wafers (If Dave doesn’t mind doing a bunch of imaging, maybe 5-10 samples/wafer). The first step would be to deposit an oxide ~50nm thick from one gun w/o rotation, and have me profile the thickness, so we know what we are dealing with in terms of variation, and the relationship to our typical dep rate.
Sounds like a plan. What about using one of SiMPore’s TEM grid masks?